Custom ASICs, Analog Circuit Design, Digital Circuit Design, Custom Analog and Digital Physical Design and More

• End-to-end architecture, design, verification, packaging, test, qualification, and production support for custom ASIC, SoC, MCM and 2.5D solutions, including system modeling, IP integration, and supply chain management.
• Mixed signal design expertise.
• Technology selection consultation.
• Defense, medical, consumer, and automotive space.
• Packaging, test, and qualification consultation.

• Proactive DMSMS management of microelectronics through re-design of obsolete ICs and MCMs with sustainable manufacturing, packaging and testing to supply form, fit and function drop-in replacements.

• RF transceivers, LNAs, oscillators, switched-capacitor circuits, and low-noise signal conditioning solutions for communications and high-reliability applications; RF/high speed digital transmission line and interposer routing design experience.
• Power Management design expertise (PMIC)
• Mixed Signal, LDO, amplifiers, LNA, OTA, ADC, DAC, Bandgap, PLL, POR
• Mixed mode simulations, Verilog modeling.
• Circuit simulation in SPICE, Spectre, FastSpice.

• RTL VHDL coding and test bench verification
• Verilog gate level net list manipulation, including complex ECO metal changes
• Simulators – Modelsim, Cver, VCS, Silos
• Synthesis – Design Compiler, Design Vision by Synopsys
• STA – Primetime, post layout timing closure
• DFT Compiler, ATPG, Scan-insertion, JTAG, Boundary Scan
• RTL design in Verilog
• RTL design from specifications, e.g. UART, I2C, SPI, CAN.
• Functional simulation using VCS, NCSim, Xcelium.
• Design Verification using UVM. Constrained random, coverage driven, assertion based verification. LEC using Formality

• Non-Volatile Memory (NAND/NOR, ReRAM, EEPROM)
  • Multiple Products PD
  • Flash IPs
  • ReRAM test circuits
• Static Random-Access Memory (Async/Sync, Embedded)
  • Asynchronous SRAM
  • Sync SRAM & Embedded
  • Compiler development
• Dynamic Random-Access Memory (Synchronous)
  • Multiple Products PD
• Addressable Arrays
  • ROIC
  • Imaging

Analog

• Extensive experience with Analog circuit mask layout (physical design)
• Experience in technologies from 250nm to 3nm (FinFET).
• Critical matching strategies, shielding, sensitive route considerations, high voltage, RF requirements, etc.
• Block level to SoC Floorplanning.

Custom Digital

• Synthesis, SDC constraint development
• Synopsys Design Compiler, ICC. Cadence Genus, Innovus
• Floor planning, CTS, STA, timing closure
• Parasitic extraction, physical verification
• Scan-insertion, JTAG, Boundary Scan, ATPG

All Physical Design

• Foundry technologies include Skywater, TSMC, SMIC, Tower, XFab, GF.
• Experience in analog mixed-signal and custom digital
• Low noise designs, RF, Defense/Space, medical devices, power management.

• Need to move a key design to the next process node but don’t have the resources? Let us migrate it for you.

• Technical Knowledge in Key Areas
  • RF Experiments
  • ESD: Electrostatic Discharge
  • SML: Spice Modeling Structures
  • IYM: Integrated Yield Manufacturing
  • WLR, GOI, Packaging, Process Exp.
  • Analog and Mixed-Signal Layout
• Test chip generation (custom and IP which does automatic test module generation)
• K2™, Assura™ DRC and LVS
• CDK PCELLs, Custom PCELLs
• Partner with Engineers to Customize Layout Solutions
• Process Flow and Device Knowledge

• Design to Manufacturing Flow Execution
• Design to Manufacturing Design Flow Optimization

• Device Characterization
• Test Program Development and Optimization
• Test Program re-Targeting

• Looking for specific skills? Let us help. We are constantly recruiting to supply the best talent to our customers. Whether it is on a contract basis or for full time employment, we can find and screen candidates in all skill areas.