Services – Analog Circuit Design, Layout, Digital Circuit Design and More
IC Enable is a premier design, and layout services company.
Our team has experience with full-custom chip layout, seamlessly taking our customers from planning to top-level PG hand-off. With extensive experience in analog circuit layout techniques related to critical matching, shielding, sensitive routes, high voltage, RF requirements, and routing considerations, the IC Enable model allows us to supply clients with the needed additional capacity and expertise for layout and design projects.
With industry-leading specialists at hand, IC Enable provides:
- Technical training for both entry-level and experienced IC Designers
- Local and remote staffing
- Targeted resource management
- Innovation, automation, and flexibility
- Project Management
Analog Circuit Layout
- Extensive experience with Analog circuit layout
- Critical matching strategies, shielding, sensitive route considerations, high voltage, RF requirements, etc.
- Experienced in all levels of complexity from cell level to top level
Analog Circuit Design
- Mixed Signal, LDO, amplifiers, LNA, OTA, ADC, DAC, Bandgap, PLL, POR
- Mixed mode simulations, Verilog modeling.
- Circuit simulation in SPICE, Spectre, FastSpice.
Digital Circuit Design
- RTL VHDL coding and test bench verification
- Verilog gate level net list manipulation, including complex ECO metal changes
- Simulators – Modelsim, Cver, VCS, Silos
- Synthesis – Design Compiler, Design Vision by Synopsys
- STA – Primetime, post layout timing closure
- DFT Compiler, ATPG, Scan-insertion, JTAG, Boundary Scan
Digital Design (RTL Design) and Verification
- RTL design in Verilog
- RTL design from specifications, e.g. UART, I2C, SPI, CAN.
- Functional simulation using VCS, NCSim, Xcelium.
- Design Verification using UVM. Constrained random, coverage driven, assertion based verification. LEC using Formality
Digital Physical Design
- Synthesis, SDC constraint development
- Synopsys Design Compiler, ICC. Cadence Genus, Innovus
- Floor planning, CTS, STA, timing closure
- Parasitic extraction, physical verification
- Scan-insertion, JTAG, Boundary Scan, ATPG
Design Process Migration
- Need to move a key design to the next process node but don’t have the resources? Let us migrate it for you.
Full Custom ASIC Design
- Mixed signal design expertise.
- Turnkey ASIC design, from high level chip specifications to GDS.
- Technology selection consultation.
- Medical, consumer, and automotive space.
- Packaging, test, and qualification consultation.
Integrated Circuit Layout
- Experience in technologies from 250nm to 3nm (FinFET).
- Foundry technologies include Skywater, TSMC, SMIC, Tower, XFab, GF.
- Experience in analog mixed-signal and custom digital.
- Block level to SoC Floorplanning.
- Low noise designs, RF, Defense/Space, medical devices, power management.
Technology Development Design and Layout
- Technical Knowledge in Key Areas
- RF Experiments
- ESD: Electrostatic Discharge
- SML: Spice Modeling Structures
- IYM: Integrated Yield Manufacturing
- WLR, GOI, Packaging, Process Exp.
- Analog and Mixed-Signal Layout
- Test chip generation (custom and IP which does automatic test module generation)
- K2™, Assura™ DRC and LVS
- CDK PCELLs, Custom PCELLs
- Partner with Engineers to Customize Layout Solutions
- Process Flow and Device Knowledge
Release to Manufacturing (Pattern Generation)
- Design to Manufacturing Flow Execution
- Design to Manufacturing Design Flow Optimization
- Device Characterization
- Test Program Development and Optimization
- Test Program re-Targeting
- Looking for specific skills? Let us help. We are constantly recruiting to supply the best talent to our customers. Whether it is on a contract basis or for full time employment, we can find and screen candidates in all skill areas.
“Analog design is such a specialty that you always worry if a provider has the requisite skills to be able to do what’s needed. And whether they’ll be able to adapt to the practices we have. We’ve always had good luck with anybody that IC Enable supplied. So, we’ve always gone back to them because there was a high degree of trust that they knew how to screen people appropriately for the task at hand.”
– COO, Palma Ceia SemiDesign